Ternary logic circuits resemble binary logic circuits, but with three logic levels instead of only two. In this article I’ll build a TNAND gate and TAND gate, analogous to the binary NAND gate and AND gate.
This is a follow-up to Exploring ternary logic: building ternary inverters using complementary MOSFETs, where a ternary inverter (or actually, three types of inverters from the same circuit: PTI, STI, NTI — see the article for details) was designed and implemented. I’m using the same types of components as the ternary inverter, and constructing the circuit on the same prototype board, but building a ternary NAND gate instead. Then I’ll chain the TNAND to an STI (simple ternary inverter, analogous to binary NOT) to create a TAND gate.
The design is based on Ternary logic circuits with CMOS integrated circuits (US4107549A) by Hussein T. Mouftah (1977):
Figure 3 is the TNAND gate we want, with two P-channel MOSFETs on the top and two N-channel MOSFETs on the bottom, logic inputs A (labeled 86) and B (labeled 88), and the TNAND output at the junction of the two resistors (labeled 80). I used BSS84’s for P-channels, 2N7002 for N-, and 10 kΩ resistors, all surface-mount, as before, then soldered it up:
but immediately ran into an issue:
Short circuit incident: replacing the bipolar power supply
I started building this gate on the same board as in Exploring ternary logic: building ternary inverters using complementary MOSFETs. But while wiring up the power, I accidentally shorted the power rails, smoking the transistors:
completely carbonized:
fortunately only on the inverter. But my ±5V power supply as built in Surface-mount electronics for hobbyists: easier than you think is now also destroyed, outputing 24 V across -5 and +5.
To move forward, I changed to a different power supply unit: a kit with dual variable positive voltages, and a common negative terminal. Since it couldn’t output negative voltages relative to the common terminal, I adjusted the first voltage to +5 V, the second to +10 V, then took the “ground” as the first voltage (+5 V), common as -5 V, and the second voltage (+10 V) as +5 V.
When splitting the power like this, it is important to not get confused about the “ground” reference point, especially if it is connected to earth. I’m not using a safety ground in this circuit so the different “grounds” in the power supply versus the logic circuit (-5 V relative to each other) do not matter, but if you care about this it may be a better option to use a charge pump like the ICL7660 to obtain a -5 V negative voltage from a +5 V supply, both relative to the same ground. For another time, perhaps.
Anyways, now that we have a working ±5 V supply, lets move on.
Repairing the ternary inverter
First things first: fixing the blown ternary logic inverter.
After powering it up with the new and working ±5 V power supply, observed some strange behavior. When only -5 V and ground were connected, all of the output LEDs (NTI, STI, and PTI) emitted green. When additionally +5 V was connected, the… transistors glowed red!
Although light-emitting transistors exist, the purpose of the transistors in this circuit is for logic/switching, so clearly they are damaged and ought to be replaced. Fortunately the LEDs and resistors escaped unscathed.
After replacing both the P-channel (BSS84) and N-channel (2N7002) MOSFETs (closeup of replacements shown above), the inverter behaves as expected, same as before in Exploring ternary logic: building ternary inverters using complementary MOSFETs:
Now back to the TNAND gate.
TNAND gate wiring diagram
The schematic from Mouftah is quite informative, but overly busy:
and difficult to build a circuit from directly. To keep things straight, I first laid out each of the FETs where they’ll be placed on the SMD protoboard:
then drew where the wiring connections are to be made:
Not the prettiest diagram (TODO: better tool, could use a full-blown PCB layout tool for this? even though routing wires, not tracks), but it gets the job done. Completed the circuit construction, then I also added bicolor LEDs in series with 10 kΩ resistors, for showing the logic level of each of the inputs (A and B, two in the upper-left) and the output (TNAND, lower left corner):
Testing the TNAND
Does it work? First tested with a zero for the A input, negative for the B input (TNAND on the left of the board, inverter on the right):
The output of NOT (0 AND -) is +, as expected.
Logic AND can be thought of as outputting the “minimum” of all its inputs. This holds true for any number of inputs, any radix — including binary and ternary. Logic NAND subsequentially inverts the output: for ternary, flipping positive and negative.
Zooming in and trying a different set of inputs:
NOT (+ and -) = NOT (-) = +, also the output we expect.
If both inputs are zero, then output is also zero (not shown, too boring).
What set of inputs to TNAND would give a negative (green) output? There is only one combination: when both inputs are +: NOT (+ and +) = NOT (+) = -. Sure enough, we get what we expect, it works:
I’ll spare you screenshots of each of the 9 possible input combinations, but here are the TAND and TNAND truth tables for reference:
Building TAND from TNAND and STI
What can we do with a TNAND gate? According to Exploring Universal Ternary Gates by Craig Gidney (2013), it is one of the 3773 two-input ternary gates that can be considered “universal” (of 19383 total), able to build any other gate. But to start simple, I’ll first combine it with an inverter gate.
This board already has a simple ternary inverter (again, implemented in Exploring ternary logic: building ternary inverters using complementary MOSFETs), which can be connected to the output of the TNAND gate to create a TAND gate.
It sort of works, here is the inverted output of (- TNAND -):
But there is a slight problem: the positive inverter is the brightest, but the simple inverter is dimmer, and the negative inverter the weakest output yet. The logic levels are reaching their thresholds, low fan-out, etc.
In fact, I had to disconnect the TNAND output LED to get the correct logic output from the inverter, if connected the inverter receives a logic zero:
TODO: investigate improving this situation this by building a “buffer” gate (two inverters chained together) to reconstruct the logic level signal. For using this logic circuit in a real application, more design and analysis may be needed.
Conclusions
In this brief follow-up to Exploring ternary logic: building ternary inverters using complementary MOSFETs, we have seen the construction of two two-input ternary logic gates, TNAND and TAND (from TNAND + STI), using CMOS with bicolor LEDs for input and output logic level indication.
The construction of the ternary gate was successful as an initial proof-of-concept, but point-to-point wiring of surface-mount components on a protoboard is a cumbersome and error-prone process, with one mistaken short-circuit leading to the destruction of two transistors (not a big monetary loss, thanks to Buying from China, set me back only 1.72¢ + 1.00¢ = 2.72¢) and the surplus PC fan I was using in DIY fume extractor for soldering safely, in addition to the bipolar power supply itself built in Surface-mount electronics for hobbyists: easier than you think. Fortunately I had a dual power supply and spare transistors on hand to continue the project, replacing the fume extractor with an open window.
Any more complex ternary logic circuits would greatly benefit from construction on a custom-designed printed circuit board, with tracks already routed to the MOSFETs and transistors and LEDs, obviating the requirement for manual point-to-point wiring. With the small footprint of 0603 and SOT-23, a fair amount of ternary circuitry could be packed into a 5x5 board.